Naked WIZes - page 1

Here is an interesting function: mult-funct(x,y) = x*y

   gateway => multiplier ; gateway => multiplier ; multiplier => gateway

If a WIZ had no multiplier on its bus, it could merely call this function instead. IE:

  instead of:  X => multiplier ; Y => multiplier ; multiplier => Z
  it could do: X => mult-funct ; Y => mult-funct ; mult-funct => Z

A speed-critical sequence that needed a multiplier would be placed in a WIZ with a high-speed multiplier directly on its bus. But if speed were not an issue, the OS placement algorithm could place a sequence which needed a multiplier into a WIZ without a multiplier, and substitute a call to the above function for all its multiplies.

This is slower than having a local multiplier. But consider a typical Intel Core that has 2 or 4 Floating Point Units (FPUs). An 8 Core chip might have 16 or 32 FPUs in total. A WIZ chip with the same number of similar FPUs, each on another WIZ running a function like the above, would be at least as powerful and just as fast.

Traveling across WIZ buses is no less costly (in time or energy) than the various buses in an Intel chips which route internal registers across the chip to its FPUs.

Thus, when I say this is slower, it is still as fast or faster than an Intel-style cpu, and when I say a "speed-critical sequence ... would have a high-speed multiplier directly on its bus" I mean "far faster than an Intel-style cpu".

And of course, we can have not just mult-funct, but also add-funct, subtract-funct, divide-funct, squareRoot-funct, cosine-funct, etc. And many copies of each, spread throughout the chip.